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Délia Boino
Submitted by dboino on 22 March 2021
Intended learning outcomes

Design and implement HW/SW systems in FPGA.

Understand the concepts and techniques for system-level design of systems with hardware and software components. Model, simulate and synthesize digital systems using methods and tools at system level. Understand HW/SW architectures in particular the mechanisms of communication, memory sharing and synchronization.

Use profiling tools to help in the hardware-software partition of algorithms.

Use high-level synthesis tools to automatically synthesize C and C++ functions into hardware and its integration with the software.


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